73 search results - page 8 / 15 » New Results on Instruction Cache Attacks |
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads block the execution of dependent instructions,...
USS
2010
13 years 5 months ago
2010
Idle port scanning uses side-channel attacks to bounce scans off of a "zombie" host to stealthily scan a victim IP address and determine if a port is open or closed, or ...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
MICRO
2003
IEEE
14 years 20 days ago
2003
IEEE
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
ICCD
1999
IEEE
13 years 11 months ago
1999
IEEE
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...