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ECEASST
2008
83views more  ECEASST 2008»
13 years 8 months ago
Layered Architecture Consistency for MANETs: Introducing New Team Members
In this paper we extend our results (as given in [PHE+07]) concerning the layered architecture for modeling workflows in Mobile Ad-Hoc NETworks (MANETs) using algebraic higher ord...
Enrico Biermann, Kathrin Hoffmann, Julia Padberg
ISCA
2008
IEEE
107views Hardware» more  ISCA 2008»
14 years 3 months ago
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments
This paper seeks to understand and design nextgeneration servers for emerging “warehousecomputing” environments. We make two key contributions. First, we put together a detail...
Kevin T. Lim, Parthasarathy Ranganathan, Jichuan C...
TVLSI
2008
106views more  TVLSI 2008»
13 years 8 months ago
New Non-Volatile Memory Structures for FPGA Architectures
A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is describ...
David Choi, Kyu Choi, John D. Villasenor
AGI
2008
13 years 10 months ago
Vector Symbolic Architectures: A New Building Material for Artificial General Intelligence
We provide an overview of Vector Symbolic Architectures (VSA), a class of structured associative memory models that offers a number of desirable features for artificial general int...
Simon D. Levy, Ross Gayler
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden