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VISUALIZATION
1998
IEEE
13 years 12 months ago
Building perceptual textures to visualize multidimensional datasets
This paper presents a new method for using texture to visualize multidimensional data elements arranged on an underlying threedimensional height field. We hope to use simple textu...
Christopher G. Healey, James T. Enns
ASPDAC
2009
ACM
212views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...
Kwangok Jeong, Andrew B. Kahng
GRC
2008
IEEE
13 years 8 months ago
Effects of Varying the Delay Distribution in Random, Scale-free, and Small-world Networks
Graph-theory-based approaches have been used with great success when analyzing abstract properties of natural and artificial networks. However, these approaches have not factored...
Bum Soon Jang, Timothy Mann, Yoonsuck Choe
DCG
2010
132views more  DCG 2010»
13 years 7 months ago
Delaunay Refinement for Piecewise Smooth Complexes
We present a Delaunay refinement algorithm for meshing a piecewise smooth complex in three dimensions. The algorithm protects edges with weighted points to avoid the difficulty po...
Siu-Wing Cheng, Tamal K. Dey, Edgar A. Ramos
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...