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134
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ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
15 years 9 months ago
A low-power crossroad switch architecture and its core placement for network-on-chip
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
125
Voted
IPPS
1998
IEEE
15 years 8 months ago
A Development Tool Environment for Configuration, Build, and Launch of Complex Applications
The increasing size and complexity of high-performance applications have motivated a new round of innovation related to configuration, build, and launch of applications for large ...
Mike Krueger
124
Voted
FOCI
2007
IEEE
15 years 10 months ago
Random Hypergraph Models of Learning and Memory in Biomolecular Networks: Shorter-Term Adaptability vs. Longer-Term Persistency
Recent progress in genomics and proteomics makes it possible to understand the biological networks at the systems level. We aim to develop computational models of learning and memo...
Byoung-Tak Zhang
134
Voted
RTAS
1998
IEEE
15 years 8 months ago
Using Windows NT for Real-Time Applications: Experimental Observations and Recommendations
Windows NT was not designed as a real-time operating system, but market forces and the acceptance of NT in industrial applications have generated a need for achieving real-time fu...
Krithi Ramamritham, Chia Shen, Oscar Gonzál...
152
Voted
EDCC
2008
Springer
15 years 5 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...