38 search results - page 5 / 8 » NoC Design and Implementation in 65nm Technology |
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
Thermal energy harvesting using micro-scale thermoelectric generators is a promising approach to alleviate the power supply challenge in ultra low power systems. In thermal energy...
JCM
2008
13 years 7 months ago
2008
With the feature size of semiconductor technology reducing and intellectual properties (IP) cores increasing, on chip communication architectures have a great influence on the perf...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...