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» Noise-tolerant dynamic circuit design
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ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 6 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
ISCAS
2003
IEEE
83views Hardware» more  ISCAS 2003»
14 years 3 months ago
Low-noise low-power allpole active-RC filters minimizing resistor level
The design procedure of 2nd - and 3rd -order low-sensitivity lowpower allpole active resistance-capacitance (RC) filters, using the impedance tapering design method has already be...
Drazen Jurisic, George S. Moschytz, Neven Mijat
CASES
2005
ACM
13 years 11 months ago
Energy management for commodity short-bit-width microcontrollers
Dynamic frequency scaling and dynamic voltage scaling have been developed to save power and/or energy for general purpose computing platforms and high-end embedded systems. This p...
Rony Ghattas, Alexander G. Dean
DATE
2007
IEEE
148views Hardware» more  DATE 2007»
14 years 4 months ago
Temperature aware task scheduling in MPSoCs
In deep submicron circuits, elevation in temperatures has brought new challenges in reliability, timing, performance, cooling costs and leakage power. Conventional thermal managem...
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Keith...
DAC
2007
ACM
14 years 10 months ago
Fast Min-Cost Buffer Insertion under Process Variations
Process variation has become a critical problem in modern VLSI fabrication. In the presence of process variation, buffer insertion problem under performance constraints becomes mo...
Ruiming Chen, Hai Zhou