339 search results - page 52 / 68 » Noise-tolerant dynamic circuit design |
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract— We present a silicon neuron that responds with a highfrequency burst of spikes (> 250Hz) when appropriately primed; otherwise it responds with lower frequency single...
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract—This paper presents a ultra low-power, lowcomplexity circuit to generate the monocycle pulse for Impulse Radio UWB (IR-UWB) applications. A 7th order derivative Gaussian...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
—An analog filter is designed based upon the requirement of an interference rejection filter for the Quadrature Downconversion Autocorrelation Receiver (QDAR). The transfer funct...
FPL
2005
Springer
14 years 3 months ago
2005
Springer
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
DATE
2003
IEEE
14 years 3 months ago
2003
IEEE
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...