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HPCA
2009
IEEE
14 years 10 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
HICSS
2003
IEEE
114views Biometrics» more  HICSS 2003»
14 years 3 months ago
Trusted Software's Holy Grail
In this paper, we discuss what we believe is the grand challenge facing the software quality research community: the ability to accurately define, in the very earliest stages of d...
Jeffrey M. Voas
SIGMETRICS
2008
ACM
121views Hardware» more  SIGMETRICS 2008»
13 years 9 months ago
Disk scrubbing versus intra-disk redundancy for high-reliability raid storage systems
Two schemes proposed to cope with unrecoverable or latent media errors and enhance the reliability of RAID systems are examined. The first scheme is the established, widely used d...
Ilias Iliadis, Robert Haas, Xiao-Yu Hu, Evangelos ...
ICAC
2005
IEEE
14 years 3 months ago
Towards a Framework and a Design Methodology for Autonomic SoC
This paper proposes autonomic or organic computing principles to be applied to hardware design methods for future SoC solutions. Incorporating self-calibration, fault tolerance or...
Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang...
VTC
2007
IEEE
109views Communications» more  VTC 2007»
14 years 4 months ago
A Reliability-Aware LDPC Code Decoding Algorithm
— With the continuing downscaling of microelectronic technology, chip reliability becomes a great threat to the design of future complex microelectronic systems. Hence increasing...
Matthias Alles, Torben Brack, Norbert Wehn