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» Non-uniform Instruction Scheduling
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DAC
1995
ACM
13 years 11 months ago
Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores
Application domain specific DSP cores are becoming increasingly popular due to their advantageous trade–off between flexibility and cost. However, existing code generation metho...
Adwin H. Timmer, Marino T. J. Strik, Jef L. van Me...
ASPLOS
2008
ACM
13 years 9 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
HPCA
2006
IEEE
14 years 7 months ago
Efficient instruction schedulers for SMT processors
We propose dynamic scheduler designs to improve the scheduler scalability and reduce its complexity in the SMT processors. Our first design is an adaptation of the recently propos...
Joseph J. Sharkey, Dmitry V. Ponomarev
LCPC
1999
Springer
13 years 11 months ago
Instruction Scheduling in the Presence of Java's Runtime Exceptions
One of the challenges present to a Java compiler is Java’s frequent use of runtime exceptions. These exceptions affect performance directly by requiring explicit checks, as wel...
Matthew Arnold, Michael S. Hsiao, Ulrich Kremer, B...
ISQED
2008
IEEE
119views Hardware» more  ISQED 2008»
14 years 1 months ago
Instruction Scheduling for Variation-Originated Variable Latencies
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay also has variat...
Toshinori Sato, Shingo Watanabe