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HPCA
2008
IEEE
14 years 7 months ago
PEEP: Exploiting predictability of memory dependences in SMT processors
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
Samantika Subramaniam, Milos Prvulovic, Gabriel H....
IPPS
2005
IEEE
14 years 1 months ago
Configuration Steering for a Reconfigurable Superscalar Processor
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Brian F. Veale, John K. Antonio, Monte P. Tull
MICRO
2005
IEEE
123views Hardware» more  MICRO 2005»
14 years 1 months ago
A Criticality Analysis of Clustering in Superscalar Processors
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...
Pierre Salverda, Craig B. Zilles
CC
2004
Springer
14 years 24 days ago
Region-Based Partial Dead Code Elimination on Predicated Code
Abstract. This paper presents the design, implementation and experimental evaluation of a practical region-based partial dead code elimination (PDE) algorithm on predicated code in...
Qiong Cai, Lin Gao 0002, Jingling Xue
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
14 years 15 days ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...