94 search results - page 16 / 19 » Novel CNTFET-based Reconfigurable Logic Gate Design |
ICCD
2001
IEEE
14 years 5 months ago
2001
IEEE
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
ARVLSI
2001
IEEE
14 years 1 days ago
2001
IEEE
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
CODES
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
VLSISP
2010
13 years 6 months ago
2010
— This paper presents ALA (Adaptable Logarithm Approximation), a novel hardware architecture for the approximation of the base-2 logarithm of integers at an arbitrary accuracy, s...