129 search results - page 6 / 26 » Novel Design Methodology for High-Performance XOR-XNOR Circu... |
DAC
2001
ACM
14 years 9 months ago
2001
ACM
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
DAC
1997
ACM
14 years 23 days ago
1997
ACM
Abstract - This paper describes the development of a concurrent methodology for standard cell library generation. Use of a novel physical design automation method enables a high de...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
CHINAF
2006
13 years 8 months ago
2006
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...
ATS
2009
IEEE
14 years 3 months ago
2009
IEEE
Power distribution network (PDN) designs for today’s high performance integrated circuits (ICs) typically occupy a significant share of metal resources in the circuit, and henc...