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DFT
2006
IEEE
82views VLSI» more  DFT 2006»
14 years 1 months ago
VLSI Implementation of a Fault-Tolerant Distributed Clock Generation
In this paper we will introduce a novel approach for the on-chip generation of a faulttolerant clock. We will motivate why it becomes more and more desirable to provide VLSI circu...
Markus Ferringer, Gottfried Fuchs, Andreas Steinin...
ISCA
2006
IEEE
121views Hardware» more  ISCA 2006»
14 years 1 months ago
Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors
A simple and low-cost approach to supporting snoopy cache coherence is to logically embed a unidirectional ring in the network of a multiprocessor, and use it to transfer snoop me...
Karin Strauss, Xiaowei Shen, Josep Torrellas
ARC
2010
Springer
128views Hardware» more  ARC 2010»
13 years 11 months ago
Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensing
Abstract. This paper presents a brief tutorial and background on implementing filter banks for spectrum sensing. It discusses the advantages of this approach over standard FFT-base...
Suhaib A. Fahmy, Linda Doyle
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
14 years 1 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton
DAC
2000
ACM
13 years 12 months ago
System design of active basestations based on dynamically reconfigurable hardware
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
Athanassios Boulis, Mani B. Srivastava