In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...
Empirical performance evaluation of parallel systems and applications can generate significant amounts of performance data and analysis results from multiple experiments as perfo...
Kevin A. Huck, Allen D. Malony, Robert Bell, Alan ...
Abstract— In general, the performance and radio resource utilization of Ad Hoc networks are limited by half-duplex operation and possible collisions. In this paper, we propose a ...
This paper proposes a method of model-driven HW/SW co-design in embedded system design and discusses the key technology of model mapping, automatic generating codes and performanc...
Double-Gate (DG) transistor has emerged as the most promising device for nano-scale circuit design. Independent control of front and back gate in DG devices can be effectively use...