This study reports the findings of a usability test conducted to examine users' interaction with two different learning object metadata-driven search result interfaces. The f...
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
Alper Buyuktosunoglu, Stanley Schuster, David Broo...
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling—leadi...
Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blac...