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ICS
2009
Tsinghua U.
14 years 3 months ago
Exploring pattern-aware routing in generalized fat tree networks
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
Germán Rodríguez, Ramón Beivi...
HPCA
2003
IEEE
14 years 11 months ago
Dynamic Data Replication: An Approach to Providing Fault-Tolerant Shared Memory Clusters
A challenging issue in today's server systems is to transparently deal with failures and application-imposed requirements for continuous operation. In this paper we address t...
Rosalia Christodoulopoulou, Reza Azimi, Angelos Bi...
CHES
2007
Springer
154views Cryptology» more  CHES 2007»
14 years 5 months ago
Multi-gigabit GCM-AES Architecture Optimized for FPGAs
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert ...
BMCBI
2008
214views more  BMCBI 2008»
13 years 11 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 8 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt