Sciweavers

7195 search results - page 68 / 1439
» On Computing Power
Sort
View
VLSID
2007
IEEE
98views VLSI» more  VLSID 2007»
14 years 11 months ago
Power Reduction in VLIW Processor with Compiler Driven Bypass Network
Neeraj Goel, Anshul Kumar, Preeti Ranjan Panda
VLSID
2005
IEEE
108views VLSI» more  VLSID 2005»
14 years 11 months ago
Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
EWSN
2010
Springer
14 years 5 months ago
Exploiting Overlapping Channels for Minimum Power Configuration in Real-Time Sensor Networks
Xiaodong Wang, Xiaorui Wang, Guoliang Xing, Yanjun...