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» On Design and Application Mapping of a Network-on-Chip(NoC) ...
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ESTIMEDIA
2008
Springer
13 years 9 months ago
A framework for memory-aware multimedia application mapping on chip-multiprocessors
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasric...
ASAP
1997
IEEE
155views Hardware» more  ASAP 1997»
13 years 11 months ago
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
In this paper we present an approach for quantitative analysis of application-specific dataflow architectures. The approach allows the designer to rate design alternatives in a qu...
Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, ...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 1 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
MJ
2006
145views more  MJ 2006»
13 years 7 months ago
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
Michalis D. Galanis, Athanasios Milidonis, Athanas...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
13 years 11 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli