216 search results - page 24 / 44 » On High-Bandwidth Data Cache Design for Multi-Issue Processo... |
ISCA
1997
IEEE
14 years 4 hour ago
1997
IEEE
Prefetching is one approach to reducing the latency of memory operations in modern computer systems. In this paper, we describe the Markov prefetcher. This prefetcher acts as an i...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
The widening gap between processor and memory speeds renders data locality optimization a very important issue in data-intensive embedded applications. Throughout the years hardwa...
HPCA
1998
IEEE
14 years 1 days ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
VLDB
1999
ACM
14 years 1 days ago
1999
ACM
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...