216 search results - page 28 / 44 » On High-Bandwidth Data Cache Design for Multi-Issue Processo... |
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
MICRO
2000
IEEE
14 years 6 days ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
ISCA
2002
IEEE
14 years 22 days ago
2002
IEEE
Tarantula is an aggressive floating point machine targeted at technical, scientific and bioinformatics workloads, originally planned as a follow-on candidate to the EV8 processo...
SC
1992
ACM
13 years 12 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...