Sciweavers

216 search results - page 38 / 44
» On High-Bandwidth Data Cache Design for Multi-Issue Processo...
Sort
View
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
14 years 1 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
ESTIMEDIA
2005
Springer
14 years 1 months ago
Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
Manish Verma, Klaus Petzold, Lars Wehmeyer, Heiko ...
SIGCOMM
1997
ACM
14 years 19 hour ago
Small Forwarding Tables for Fast Routing Lookups
For some time, the networking communityhas assumed that it is impossible to do IP routing lookups in software fast enough to support gigabit speeds. IP routing lookups must nd th...
Mikael Degermark, Andrej Brodnik, Svante Carlsson,...
ICS
2007
Tsinghua U.
14 years 2 months ago
Optimization of data prefetch helper threads with path-expression based statistical modeling
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
Tor M. Aamodt, Paul Chow
ASPLOS
2010
ACM
13 years 11 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...