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DAC
2002
ACM
14 years 11 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
DAC
2004
ACM
14 years 11 months ago
Efficient on-line testing of FPGAs with provable diagnosabilities
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
Vinay Verma, Shantanu Dutt, Vishal Suthar
DAC
2005
ACM
14 years 11 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
DAC
2006
ACM
14 years 11 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ICSE
2008
IEEE-ACM
14 years 11 months ago
Are fit tables really talking?: a series of experiments to understand whether fit tables are useful during evolution tasks
Test-driven software development tackles the problem of operationally defining the features to be implemented by means of test cases. This approach was recently ported to the earl...
Filippo Ricca, Massimiliano Di Penta, Marco Torchi...
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