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FPGA
2010
ACM
13 years 9 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
JUCS
2000
13 years 8 months ago
2000
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
IPMI
1999
Springer
14 years 1 months ago
1999
Springer
—Guidance systems designed for neurosurgery, hip surgery, spine surgery and for approaches to other anatomy that is relatively rigid can use rigid-body transformations to accompl...