826 search results - page 88 / 166 » On Local Register Allocation |
ASPDAC
1998
ACM
14 years 1 months ago
1998
ACM
Functional debugging often dominates the time and cost of the ASIC system development, mainly due to the limited controllability and observability of the storage elements in desig...
ICALP
1990
Springer
14 years 29 days ago
1990
Springer
Any tree can be represented in a max/ma//y compact form as a directed acyclic graph where common subtrees are factored and shared, being represented only once. Such a compaction ca...
CODES
2004
IEEE
14 years 19 days ago
2004
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
DATE
2004
IEEE
14 years 19 days ago
2004
IEEE
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
LCPC
2000
Springer
14 years 14 days ago
2000
Springer
This paper presents recursion unrolling, a technique for improving the performance of recursive computations. Conceptually, recursion unrolling inlines recursive calls to reduce c...