Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
Designing MOS decoupling capacitors (DECAPs) in nanotechnologies provides many challenges due to the existing trade-offs among transient time response behavior, area, and gate lea...
To address the productivity bottlenecks in power analysis and optimization of modern systems, we propose to treat power as a signal and leverage the rich set of signal processing ...
Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
In this paper we summarize recent developments in compact dynamical modeling for both linear and nonlinear systems arising in analog applications. These techniques include methods...