Sciweavers

867 search results - page 117 / 174
» On Optimization of Test Parallelization with Constraints
Sort
View
DAC
2010
ACM
14 years 9 days ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
ICPP
2005
IEEE
14 years 2 months ago
An ACO-Based Approach for Scheduling Task Graphs with Communication Costs
In this paper we introduce a new algorithm for computing near optimal schedules for task graph problems. In contrast to conventional approaches for solving those scheduling proble...
Markus Bank, Udo Hönig, Wolfram Schiffmann
IEEEPACT
2008
IEEE
14 years 3 months ago
Multi-optimization power management for chip multiprocessors
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
Ke Meng, Russ Joseph, Robert P. Dick, Li Shang
TCAD
2008
136views more  TCAD 2008»
13 years 9 months ago
A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar
ACL
2010
13 years 7 months ago
Towards Robust Multi-Tool Tagging. An OWL/DL-Based Approach
This paper describes a series of experiments to test the hypothesis that the parallel application of multiple NLP tools and the integration of their results improves the correctne...
Christian Chiarcos