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DAC
1998
ACM
13 years 12 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
ICRA
2006
IEEE
102views Robotics» more  ICRA 2006»
14 years 1 months ago
Fast Iterative Alignment of Pose Graphs with Poor Initial Estimates
— A robot exploring an environment can estimate its own motion and the relative positions of features in the environment. Simultaneous Localization and Mapping (SLAM) algorithms ...
Edwin Olson, John J. Leonard, Seth J. Teller
HIPEAC
2010
Springer
13 years 5 months ago
Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors
Abstract. Stream programming is a promising way to expose concurrency to the compiler. A stream program is built from kernels that communicate only via point-to-point streams. The ...
Paul M. Carpenter, Alex Ramírez, Eduard Ayg...
RTS
2011
131views more  RTS 2011»
13 years 2 months ago
Global scheduling based reliability-aware power management for multiprocessor real-time systems
Reliability-aware power management (RAPM) has been a recent research focus due the negative effects of the popular power management technique dynamic voltage and frequency scaling ...
Xuan Qi, Dakai Zhu, Hakan Aydin
TWC
2008
85views more  TWC 2008»
13 years 7 months ago
Improved BDFE Using A Priori Information for Turbo Equalization
Abstract-- Turbo equalization improves communication system performance by iteratively exchanging information between soft-input soft-output (SISO) equalizer and SISO channel decod...
Jingxian Wu, Sang-Yick Leong, Kah-Ping Lee, Chengs...