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ICCD
2006
IEEE
275views Hardware» more  ICCD 2006»
14 years 5 months ago
Split-Row: A Reduced Complexity, High Throughput LDPC Decoder Architecture
— A reduced complexity LDPC decoding method is presented that dramatically reduces wire interconnect complexity, which is a major issue in LDPC decoders. The proposed Split-Row m...
Tinoosh Mohsenin, Bevan M. Baas
FMSD
2006
104views more  FMSD 2006»
13 years 8 months ago
Some ways to reduce the space dimension in polyhedra computations
Convex polyhedra are often used to approximate sets of states of programs involving numerical variables. The manipulation of convex polyhedra relies on the so-called double descri...
Nicolas Halbwachs, David Merchat, Laure Gonnord
ICSM
2005
IEEE
14 years 2 months ago
Reducing Build Time through Precompilations for Evolving Large Software
Large-scale legacy programs take long time to compile, thereby hampering productivity. This paper presents algorithms that reduce compilation time by analyzing syntactic dependenc...
Yijun Yu, Homayoun Dayani-Fard, John Mylopoulos, P...
ACL
2008
13 years 10 months ago
Pairwise Document Similarity in Large Collections with MapReduce
This paper presents a MapReduce algorithm for computing pairwise document similarity in large document collections. MapReduce is an attractive framework because it allows us to de...
Tamer Elsayed, Jimmy J. Lin, Douglas W. Oard
DDECS
2009
IEEE
202views Hardware» more  DDECS 2009»
14 years 3 months ago
Asynchronous two-level logic of reduced cost
— We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints....
Igor Lemberski, Petr Fiser