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GLVLSI
2009
IEEE
113views VLSI» more  GLVLSI 2009»
14 years 18 days ago
Reducing parity generation latency through input value aware circuits
1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...
CC
2002
Springer
131views System Software» more  CC 2002»
13 years 8 months ago
Global Variable Promotion: Using Registers to Reduce Cache Power Dissipation
Global variable promotion, i.e. allocating unaliased globals to registers, can significantly reduce the number of memory operations. This results in reduced cache activity and less...
Andrea G. M. Cilio, Henk Corporaal
SIGIR
2009
ACM
14 years 3 months ago
Brute force and indexed approaches to pairwise document similarity comparisons with MapReduce
This paper explores the problem of computing pairwise similarity on document collections, focusing on the application of “more like this” queries in the life sciences domain. ...
Jimmy J. Lin
ICRA
1999
IEEE
114views Robotics» more  ICRA 1999»
14 years 1 months ago
An Effective Method to Reduce Inventory in Job Shops
Inventory plays a major role in deciding the overall manufacturing costs, and a good scheduling system should balance the on-time delivery of products versus low work-in-process (W...
Peter B. Luh, Xiaohui Zhou, Robert N. Tomastik
PFE
2001
Springer
14 years 1 months ago
Representing Product Family Architectures in an Extensible Architecture Description Language
Abstract. Product family architectures need to be captured much like “regular” software architectures. Unfortunately, representations for product family architectures are scarc...
Eric M. Dashofy, André van der Hoek