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» On Simulation-Checking with Sequential Systems
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ASAP
2008
IEEE
119views Hardware» more  ASAP 2008»
14 years 3 days ago
An FPGA architecture for CABAC decoding in manycore systems
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
Roberto R. Osorio, Javier D. Bruguera
IKE
2004
13 years 11 months ago
N-Codes: A Computerized Decision Support System for Acute Care Nursing
-. This paper describes the development of N-Codes, a system to deliver current clinical knowledge to the nurse clinician via an off-the-shelf handheld computer using wireless acce...
Howard E. Michel, Nancy M. Dluhy, Paul J. Fortier,...
AICOM
2010
127views more  AICOM 2010»
13 years 10 months ago
Interactive verification of concurrent systems using symbolic execution
This paper presents an interactive proof method for the verification of temporal properties of concurrent systems based on symbolic execution. Symbolic execution is a well known a...
Simon Bäumler, Michael Balser, Florian Nafz, ...
MSE
2003
IEEE
101views Hardware» more  MSE 2003»
14 years 3 months ago
Internet-based Tool for System-On-Chip Project Testing and Grading
A tool has been developed to automate the testing and grading of design projects implemented in reprogrammable hardware. The server allows multiple students to test circuits in FP...
Christopher K. Zuver, Christopher E. Neely, John W...
ISLPED
2003
ACM
80views Hardware» more  ISLPED 2003»
14 years 3 months ago
Level conversion for dual-supply systems
Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) im...
Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic