18 search results - page 1 / 4 » On Thermal Effects in Deep Sub-Micron VLSI Interconnects |
DAC
1999
ACM
14 years 12 months ago
1999
ACM
IEICET
2006
13 years 11 months ago
2006
DAC
1999
ACM
14 years 12 months ago
1999
ACM
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
DAC
2001
ACM
14 years 12 months ago
2001
ACM
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
DAC
2006
ACM
14 years 4 months ago
2006
ACM
VLSI engineers have traditionally used a variety of CAD analysis tools (e.g. SPICE) to deal with variability. As we go into deep sub micron issues, the analysis is becoming harder...