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ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
15 years 10 months ago
A Methodology for Verifying Memory Access Protocols in Behavioral Synthesis
— Memory is one of the most important components to be optimized in the several phases of the synthesis process. ioral synthesis, a memory is viewed as an abstract construct whic...
Gernot Koch, Taewhan Kim, Reiner Genevriere
QEST
2009
IEEE
16 years 23 days ago
A Performance Model of Zoned Disk Drives with I/O Request Reordering
—Disk drives are a common performance bottleneck in modern storage systems. To alleviate this, disk manufacturers employ a variety of I/O request scheduling strategies which aim ...
Abigail S. Lebrecht, Nicholas J. Dingle, William J...
AIS
2004
Springer
15 years 9 months ago
Timed I/O Test Sequences for Discrete Event Model Verification
Abstract. Model verification examines the correctness of a model implementation with respect to a model specification. While being described from model specification, implementatio...
Ki Jung Hong, Tag Gon Kim
GECCO
2003
Springer
15 years 11 months ago
Tightness Time for the Linkage Learning Genetic Algorithm
Abstract. This paper develops a model for tightness time, linkage learning time for a single building block, in the linkage learning genetic algorithm (LLGA). First, the existing m...
Ying-Ping Chen, David E. Goldberg
CAINE
2007
15 years 7 months ago
Interactive Thin Shells - A Model Interface for the Analysis of Physically-based Animation
Realism has always been a goal in computer graphics. However, the algorithms involved in mimicking ical world are often complex, abstract, and sensitive to changes in experimental...
James Skorupski, Zoë J. Wood, Alex Pang