The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...
— Rapidly evolving businesses generate massive amounts of time-stamped data sequences and defy a demand for massively multivariate time series analysis. For such data the predict...
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
We propose a method for constructing a video sequence of high space-time resolution by combining information from multiple lowresolution video sequences of the same dynamic scene. ...
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...