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» On Timing Analysis of Combinational Circuits
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ISQED
2010
IEEE
156views Hardware» more  ISQED 2010»
13 years 10 months ago
On the design of different concurrent EDC schemes for S-Box and GF(p)
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...
Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir,...
TCAD
2008
93views more  TCAD 2008»
13 years 8 months ago
Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion
Starting at the 65-nm node, stress engineering to improve the performance of transistors has been a major industry focus. An intrinsic stress source--shallow trench isolation (STI)...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
ICCS
2003
Springer
14 years 1 months ago
Parallelisation of Sparse Grids for Large Scale Data Analysis
Sparse Grids are the basis for efficient high dimensional approximation and have recently been applied successfully to predictive modelling. They are spanned by a collection of si...
Jochen Garcke, Markus Hegland, Ole Møller N...
TCSV
2008
225views more  TCSV 2008»
13 years 8 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
KDD
1997
ACM
143views Data Mining» more  KDD 1997»
14 years 13 days ago
Anytime Exploratory Data Analysis for Massive Data Sets
Exploratory data analysis is inherently an iterative, interactive endeavor. In the context of massive data sets, however, many current data analysis algorithms will not scale appr...
Padhraic Smyth, David Wolpert