1529 search results - page 136 / 306 » On Timing Analysis of Combinational Circuits |
QEST
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we present a novel performance analysis technique for large-scale systems modelled in the stochastic process algebra PEPA. In contrast to the well-known approach of ...
DAC
2006
ACM
14 years 2 months ago
2006
ACM
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...
EOR
2007
13 years 8 months ago
2007
We investigate the value of pooling capacity in supply chains that serve product demands of different variabilities. We build and analyze models that integrate production queuing...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
FPL
2003
Springer
14 years 1 months ago
2003
Springer
This paper presents a method for evaluating functions in hardware based on polynomial approximation with non-uniform segments. The novel use of nonuniform segments enables us to ap...