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» On Timing Analysis of Combinational Circuits
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CODES
2006
IEEE
13 years 12 months ago
Phase guided sampling for efficient parallel application simulation
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igo...
DAC
2006
ACM
14 years 2 months ago
Automated design of pin-constrained digital microfluidic arrays for lab-on-a-chip applications*
Microfluidics-based biochips, also referred to as lab-on-a-chip (LoC), are devices that integrate fluid-handling functions such as sample preparation, analysis, separation, and de...
William L. Hwang, Fei Su, Krishnendu Chakrabarty
IPSN
2005
Springer
14 years 1 months ago
Perpetual environmentally powered sensor networks
— Environmental energy is an attractive power source for low power wireless sensor networks. We present Prometheus, a system that intelligently manages energy transfer for perpet...
Xiaofan Jiang, Joseph Polastre, David E. Culler
INFOVIS
1998
IEEE
14 years 14 days ago
Geographic Visualization: Designing Manipulable Maps for Exploring Temporally Varying Georeferenced Statistics
Geographic Visualization, sometimes called cartographic visualization, is a form of information visualization in which principles from cartography, geographic information systems ...
Alan M. MacEachren, Francis P. Boscoe, Daniel Haug...
DAC
2010
ACM
13 years 8 months ago
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations
We study diagnosis of segments on speedpaths that fail the timing constraint at the post-silicon stage due to manufacturing variations. We propose a formal procedure that is appli...
Lin Xie, Azadeh Davoodi, Kewal K. Saluja