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IEEEPACT
2009
IEEE
14 years 2 months ago
SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
Lei Jin, Sangyeun Cho
IDEAS
1999
IEEE
175views Database» more  IDEAS 1999»
13 years 11 months ago
A Parallel Scalable Infrastructure for OLAP and Data Mining
Decision support systems are important in leveraging information present in data warehouses in businesses like banking, insurance, retail and health-care among many others. The mu...
Sanjay Goil, Alok N. Choudhary
BMCBI
2008
133views more  BMCBI 2008»
13 years 7 months ago
A Web-based and Grid-enabled dChip version for the analysis of large sets of gene expression data
Background: Microarray techniques are one of the main methods used to investigate thousands of gene expression profiles for enlightening complex biological processes responsible f...
Luca Corradi, Marco Fato, Ivan Porro, Silvia Scagl...
ASPLOS
1991
ACM
13 years 11 months ago
NUMA Policies and Their Relation to Memory Architecture
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
William J. Bolosky, Michael L. Scott, Robert P. Fi...
HPCA
2005
IEEE
14 years 8 months ago
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...