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» On bounding the delay of a critical path
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ICCAD
2006
IEEE
130views Hardware» more  ICCAD 2006»
14 years 7 months ago
On bounding the delay of a critical path
Process variations cause different behavior of timingdependent effects across different chips. In this work, we analyze one example of timing-dependent effects, crosscoupling ...
Leonard Lee, Li-C. Wang
VTS
2007
IEEE
95views Hardware» more  VTS 2007»
14 years 5 months ago
Delay Test Quality Evaluation Using Bounded Gate Delays
: Conventionally, path delay tests are derived in a delay-independent manner, which causes most faults to be robustly untestable. Many non-robust tests are found but, in practice, ...
Soumitra Bose, Vishwani D. Agrawal
ICCAD
2008
IEEE
129views Hardware» more  ICCAD 2008»
14 years 5 months ago
Path-RO: a novel on-chip critical path delay measurement under process variations
— As technology scales to 45nm and below, process variations will present significant impact on path delay. This trend makes the deviation between simulated path delay and actua...
Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Dat...
ICCAD
2006
IEEE
126views Hardware» more  ICCAD 2006»
14 years 7 months ago
Exploring linear structures of critical path delay faults to reduce test efforts
It has been shown that the delay of a target path can be composed linearly of other path delays. If the later paths are robustly testable (with known delay values), the target pat...
Shun-Yen Lu, Pei-Ying Hsieh, Jing-Jia Liou