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» On bounding the delay of a critical path
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ISPD
2009
ACM
127views Hardware» more  ISPD 2009»
14 years 5 months ago
Synthesizing a representative critical path for post-silicon delay prediction
Several approaches to post-silicon adaptation require feedback from a replica of the nominal critical path, whose variations are intended to reflect those of the entire circuit a...
Qunzeng Liu, Sachin S. Sapatnekar
ASPDAC
2012
ACM
290views Hardware» more  ASPDAC 2012»
12 years 6 months ago
CODA: A concurrent online delay measurement architecture for critical paths
With technology scaling, integrated circuits behave more unpredictably due to process variation, environmental changes and aging effects. Various variation-aware and adaptive desi...
Yubin Zhang, Haile Yu, Qiang Xu
ISPD
2010
ACM
156views Hardware» more  ISPD 2010»
14 years 25 days ago
Ultra-fast interconnect driven cell cloning for minimizing critical path delay
Zhuo Li, David A. Papa, Charles J. Alpert, Shiyan ...
FOCS
1997
IEEE
14 years 3 months ago
General Dynamic Routing with Per-Packet Delay Guarantees of O(distance + 1 / session rate)
A central issue in the design of modern communication networks is that of providing performance guarantees. This issue is particularly important if the networks support real-time t...
Matthew Andrews, Antonio Fernández, Mor Har...
ICMCS
2009
IEEE
130views Multimedia» more  ICMCS 2009»
13 years 8 months ago
DVBMN-l: delay variation bounded multicast network with multiple paths
Distributed Multi-party/Multi-stream systems require a multicast subnetwork capable of satisfying QoS constraints such as Delay and Delay Variation Bound so that the messages reac...
Abhishek Bhattacharya, Zhenyu Yang