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TVLSI
2010
13 years 2 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
BMCBI
2011
13 years 2 months ago
PhyloSim - Monte Carlo simulation of sequence evolution in the R statistical computing environment
Background: The Monte Carlo simulation of sequence evolution is routinely used to assess the performance of phylogenetic inference methods and sequence alignment algorithms. Progr...
Botond Sipos, Tim Massingham, Gregory E. Jordan, N...
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
12 years 11 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
RTAS
2011
IEEE
12 years 11 months ago
ARCH: Practical Channel Hopping for Reliable Home-Area Sensor Networks
Abstract—Home area networks (HANs) promise to enable sophisticated home automation applications such as smart energy usage and assisted living. However, recent empirical study of...
Mo Sha, Gregory Hackmann, Chenyang Lu
PLDI
2011
ACM
12 years 10 months ago
EnerJ: approximate data types for safe and general low-power computation
Energy is increasingly a first-order concern in computer systems. Exploiting energy-accuracy trade-offs is an attractive choice in applications that can tolerate inaccuracies. Re...
Adrian Sampson, Werner Dietl, Emily Fortuna, Danus...