305 search results - page 30 / 61 » On modeling top-down VLSI design |
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
ASPDAC
2004
ACM
14 years 29 days ago
2004
ACM
Congestion estimation is an important issue for the success of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A...
GLVLSI
2003
IEEE
14 years 25 days ago
2003
IEEE
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
SBCCI
2003
ACM
14 years 23 days ago
2003
ACM
There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
SBCCI
2003
ACM
14 years 23 days ago
2003
ACM
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...