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» On modeling top-down VLSI design
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POPL
2007
ACM
14 years 8 months ago
Geometry of synthesis: a structured approach to VLSI design
We propose a new technique for hardware synthesis from higherorder functional languages with imperative features based on Reynolds's Syntactic Control of Interference. The re...
Dan R. Ghica
ASPDAC
1999
ACM
112views Hardware» more  ASPDAC 1999»
13 years 12 months ago
Relaxed Simulated Tempering for VLSI Floorplan Designs
In the past two decades, the simulated annealing technique has been considered as a powerful approach to handle many NP-hard optimization problems in VLSI designs. Recently, a new...
Jason Cong, Tianming Kong, Dongmin Xu, Faming Lian...
TCSV
2002
119views more  TCSV 2002»
13 years 7 months ago
VLSI architecture design of MPEG-4 shape coding
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-...
FMCAD
2009
Springer
14 years 2 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 1 months ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor