The principle of adiabatic switching in conventional energyrecovery adiabatic circuit is generally explained in literature with the help of the rudimentary RC circuit driven by a ...
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...
A dual-rail CMOS adiabatic switching circuit approach is described which follows the electroid model of Hall. These circuits can operate in either the retractile cascade or the re...
This paper presents a hybrid adiabatic content addressable memory (CAM). The CAM uses an adiabatic switching technique to reduce the energy consumption in the match line while kee...
Aiyappan Natarajan, David Jasinski, Wayne Burleson...
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...