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MICRO
2003
IEEE
108views Hardware» more  MICRO 2003»
14 years 25 days ago
Reducing Design Complexity of the Load/Store Queue
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
Il Park, Chong-liang Ooi, T. N. Vijaykumar
SKG
2006
IEEE
14 years 1 months ago
A Survey of Cache/Proxy for Transparent Data Replication
Web caching is an important technology for reducing Internet access latency, alleviating network traffic, and spreading server load. An important issue that affects the performa...
Yingwei Jin, Wenyu Qu, Keqiu Li
HPCA
2002
IEEE
14 years 15 days ago
Non-Vital Loads
As the frequency gap between main memory and modern microprocessor grows, the implementation and efficiency of on-chip caches become more important. The growing latency to memory ...
Ryan Rakvic, Bryan Black, Deepak Limaye, John Paul...
HIPEAC
2007
Springer
14 years 1 months ago
Compiler-Assisted Memory Encryption for Embedded Processors
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
Vijay Nagarajan, Rajiv Gupta, Arvind Krishnaswamy
HPCA
2001
IEEE
14 years 8 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger