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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
COMPLEX
2009
Springer
14 years 2 months ago
Evolution of the Internet AS-Level Ecosystem
— We seek a simple model that describes how market forces acting on rational players result in the evolution of the multi-faceted topology of the Internet that we see today. We m...
Srinivas Shakkottai, Marina Fomenkov, Ryan Koga, D...
SIGCOMM
2009
ACM
14 years 2 months ago
Hash, don't cache: fast packet forwarding for enterprise edge routers
As forwarding tables and link speeds continue to grow, fast packet forwarding becomes increasingly challenging for enterprise edge routers. Simply building routers with ever large...
Minlan Yu, Jennifer Rexford
NOMS
2008
IEEE
139views Communications» more  NOMS 2008»
14 years 2 months ago
Fast similarity search in peer-to-peer networks
Abstract—Peer-to-peer (P2P) systems show numerous advantages over centralized systems, such as load balancing, scalability, and fault tolerance, and they require certain function...
Thomas Bocek, Ela Hunt, David Hausheer, Burkhard S...
IEEEPACT
2006
IEEE
14 years 1 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan