Sciweavers

964 search results - page 8 / 193
» On software design for stochastic processors
Sort
View
ASPDAC
2008
ACM
119views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP proces
- The in-circuit emulator (ICE) is commonly adopted as a microprocessor debugging technique. In this paper, a parameterized embedded in-circuit emulator and its retargetable debugg...
Liang-Bi Chen, Yung-Chih Liu, Chen-Hung Chen, Chun...
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
14 years 4 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
ISSS
2000
IEEE
109views Hardware» more  ISSS 2000»
13 years 11 months ago
FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors
The paper presents a novel software-pipelining algorithm suitable for optimizing compilers targeting embedded VLIW processors. The proposed algorithm is different from previous ap...
Cagdas Akturan, Margarida F. Jacome
ARITH
2009
IEEE
13 years 11 months ago
A New Binary Floating-Point Division Algorithm and Its Software Implementation on the ST231 Processor
This paper deals with the design and implementation of low latency software for binary floating-point division with correct rounding to nearest. The approach we present here targe...
Claude-Pierre Jeannerod, Herve Knochel, Christophe...
RTAS
2008
IEEE
14 years 2 months ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
Sibin Mohan, Frank Mueller