This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests ...
— Power consumption has become a crucial concern in Built In Self Test (BIST) due to the switching activity in the circuit under test(CUT). In this paper we present a novel metho...
This paper presents two new algorithms, Redundant Vector Elimination(RVE) and Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under th...
This paper introduces a new method for generating test data that combines the benefits of equivalence partitioning, boundary value analysis and cause-effect analysis. It is suitab...
We propose a periodic diagnostic algorithm based on the testing model of computation for real-time systems. The diagnostic task runs on every processor of the system. When the task...