On test generation for transition faults with minimized peak power dissipation

This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests for stuck-at faults. The proposed method is suitable for use in testing scan designs that employ enhanced scan. The method reduces the peak power consumption in benchmark circuits by 19% on the average with essentially the same test set size and the same fault coverage compared to an earlier method. Categories and subject descriptors B.8.1 [Performance and Reliability]: Reliability, Testing and Fault-Tolerance General terms Algorithm, Design, Reliability Keywords Power Dissipation, Test Generation, Transition Faults

• Type: Conference
• Year: 2004
• Where: DAC
• Authors: Wei Li, Sudhakar M. Reddy, Irith Pomeranz
• Keywords: Computer Architecture, DAC 2004, Peak Power, Stuck-at Faults, Transition Faults