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MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
14 years 2 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
CODES
2007
IEEE
14 years 2 months ago
Ensuring secure program execution in multiprocessor embedded systems: a case study
Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...
Krutartha Patel, Sridevan Parameswaran, Seng Lin S...
CP
2001
Springer
14 years 5 days ago
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. The local instruction scheduling problem is to nd a m...
Peter van Beek, Kent D. Wilken
BMCBI
2007
115views more  BMCBI 2007»
13 years 7 months ago
Recognizing protein-protein interfaces with empirical potentials and reduced amino acid alphabets
Background: In structural genomics, an important goal is the detection and classification of protein–protein interactions, given the structures of the interacting partners. We h...
Guillaume Launay, Raul Mendez, Shoshana J. Wodak, ...
BMCBI
2007
101views more  BMCBI 2007»
13 years 7 months ago
Robust detection and verification of linear relationships to generate metabolic networks using estimates of technical errors
Background: The size and magnitude of the metabolome, the ratio between individual metabolites and the response of metabolic networks is controlled by multiple cellular factors. A...
Frank Kose, Jan Budczies, Matthias Holschneider, O...