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» On the Architecture of System Verification Environments
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CSREAESA
2004
13 years 8 months ago
Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications
In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
Lubomir Ivanov
ENTCS
2008
152views more  ENTCS 2008»
13 years 7 months ago
Augur 2 - A New Version of a Tool for the Analysis of Graph Transformation Systems
We describe the design and the present state of the verification tool Augur 2 which is currently being developed. It is based on Augur 1, a tool which can analyze graph transforma...
Barbara König, Vitali Kozioura
DAC
2001
ACM
14 years 8 months ago
A Framework for Object Oriented Hardware Specification, Verification, and Synthesis
We describe two things. First, we present a uniform framework for object oriented specification and verification of hardware. For this purpose the object oriented language `e'...
Tommy Kuhn, Tobias Oppold, Markus Winterholer, Wol...
MOBICOM
2006
ACM
14 years 1 months ago
Advanced TCP evaluation testbed on mixed wired internet and satellite environments
In this paper, we present our Advanced TCP Evaluation Testbed on Mixed Wired Internet and Satellite Environments. Categories and Subject Descriptors C.2.2 [Network Protocols]:–A...
Rosario Firrincieli, Carlo Caini, Cesar Marcondes,...